Indian semiconductor ecosystem: News, Updates & Discussions.

SSPL has already developed GaN MMIC for UHF, X-band, C-band & Ku-band radar:
1739560823512.png
SSPL has also have developed 130 W HPA GaN HEMT. So far DRDO radars relied on SSPL developed 100 W HPA GaN HEMTs. The American SPY-7 radar uses ~140 W HPA GaN HEMTs. We will get to ~140 W before the P-18 design is finalized.

This poster also says 0.1-micron GaN node fab technology is under development. That has been under development for some time now. Most of the machines will be domestically made.

At present, SSPL fabricates GaN/GaAs HEMTs on 0.5- & 0.7-micron (G5a & G7a) MESFET nodes. The new node will bring a 5 to 7 times reduction in gate length. It will take a minimum of 5 more years to establish the new fab. The next gen radars will benefit from this.
1739561833007.png
1739561850461.png
 
  • Love
Reactions: Rajput Lion
Union Minister of Information and Broadcasting Ashwini Vaishnaw revealed that India's first "Made-in-India" semiconductor chip will be launched by September or October 2025.
The chip, developed in collaboration with Tata Electronics and Powerchip Semiconductor Manufacturing Corporation (PSMC), will be produced at India's first semiconductor fabrication plant in Dholera, Gujarat.
Vaishnaw also announced that the government has granted Rs 334 crore to the Indian Institute of Science (IISc), Bengaluru, for research and development in gallium nitride (GaN) technology. GaN is a key component in semiconductors used in telecom and power applications.

Source: First-ever made-in-India chip from Tata Electronics gets a 'launch timeline' - The Times of India
 
Indian scientists design 31.16%-efficient 2D-3D perovskite solar cell

Scientists in India have simulated a novel perovskite solar cell that combinies a Dion-Jacobson 2D layer with a 3D halide perovskite. The design showed improved stability compared to reference cells without the DJ-2D layer.

February 20, 2025
By Valerie Thompson
1740243054442.png
The diagram of the 2D-3D halide perovskite solar cell. Image: University of New Delhi, India

A research team in India using a computational approach designed a perovskite solar cell combining a Dion-Jacobson (DJ) 2D layer with a 3D lead-free halide perovskite, a combination that could potentially achieve a power conversion efficiency of 31.16% and improved stability results

Two-dimensional (2D) Dion-Jacobson (DJ) phase perovskites have sparked interest in the scientific community due to their stability against harsh environmental conditions and their competitive performance in optoelectronic applications. Solar cells based on DJ perovskites, however, have shown comparatively poor performance compared to their 3D counterparts to date.

The research team said that it selected a DJ 2D material known as PeDAMA4Pb5I16, and a 3D lead-free perovskite material known as CsGeI3-xBrx, and explored the effects of combining the two active layers in a perovskite solar cell. It used the SCAPS-1D solar cell capacitance software, developed by the University of Ghent, to simulate the novel cell configuration

“Our main focus is to design and propose tandem solar cell devices in perovskite/perovskite and perovskite-silicon configurations with high efficiency and stability, including linear and parabolic grading strategies in the cell devices,” research co-author Manish Kumar told pv magazine.

The optimized cell design is based on silver (Au) rear contacts, a cuprous oxide (Cu2O) hole transport layer (HTL), a 2D perovskite layer made of PeDAMA4Pb5I16, a 3D layer of CsGeI3-xBrx, an electron transport layer (ETL) based on phenyl-C61-butyric acid methyl ester (PCBM), and a front contact of fluorine-doped tinoxide (FTO).

The team said that it analyzed the effects of a variety of ETLs and HTLs, active layer thicknesses, series and shunt resistances, and temperature variations. “The best results were obtained with a thickness 0.1 μm of 2D layer and 1 μm of 3D perovskite layer, defect density (Nt) of 1 × 1013 cm−3, and shallow acceptor density (NA) of 1 × 1018 cm−3 for both DJ 2D-3D layers,” it noted.

The champion devices were 31.16%-efficient with an open circuit voltage of 1.5617 V, a short circuit current density of 22.55 mA.cm-2, and a fill factor of 88.47%. Devices made without DJ-2D had an efficiency of 30.88 %, open circuit voltage of 1.5371 V, short circuit current density of 22.10 mA.cm−2 and fill factor of 90.90%.

The team concluded that based on its findings, “the high performance, conversion efficiency, and enhanced stability of DJ 2D-3D PSCs position them not only as a viable option but as a strong alternative for future applications.”

“Our team is working on tandem based solar cell devices via computational approaches, linear and parabolic grading strategies, organic-inorganic mixed halide perovskites-based solar cells, tandem solar cells with silicon and without silicon, and solving stability-related issues by incorporating 2D materials into the PSCs,” Kumar said When asked about what lies ahead.

The group described its work in “Achieving 31.16 % efficiency in perovskite solar cells via synergistic Dion-Jacobson 2D-3D layer design,” pubished in Journal of Alloys and Compounds. The scientists participating in the research were from India's Madan Mohan Malaviya University of Technology, University of Delhi, Manipal University, along the Swedish Institute of Advanced Materials.

Indian scientists design 31.16%-efficient 2D-3D perovskite solar cell